I remenber a video posted here showing experiments without traditional memory alignment (none instead of 4 ou 8). The code is faster and use less memory as long as the data can fit in the processor cache. It was on Intel CPU.
Actually also ARM has 64 byte cache lines. ARM also tends to be more more sensitive performance wise to proper alignment than x86, before ARMv6 you couldn't even do unaligned accesses except by emulating it in software.
So the results will probably be pretty similar on ARM as well.
